1. Field of the Invention
The present invention relates to a pulse width modulation (PWM) signal generating apparatus for generating PWM signals for controlling a PWM inverter for driving a motor.
2. Description of the Related Art
Generally, in a PWM inverter for driving a motor, a PWM signal generating apparatus generates PWM signals for controlling the PWM inverter.
For example, a three-phase PWM inverter is constructed by three arms, i.e., a U-phase arm, a V-phase arm and a W-phase arm, each of the arms including an upper side power transistor and a lower side power transistor connected in series between two DC power lines.
On the other hand, a three-phase PWM signal generating apparatus generates complementary U-phase and /U-phase PWM signals, complementary V-phase and /V-phase PWM signals, and complementary W-phase and /W-phase PWM signals. As a result, the power transistors of the U-phase arm carry out a complementary push-pull operation using the U-phase and /U-phase signals. Also, the power transistors of the V-phase arm carry out a complementary push-pull operation using the V-phase and /V-phase signals. Further, the power transistors of the W-phase arm carry out a complementary push-pull operation using the W-phase and /W-phase signals.
In each of the U-phase arm, the V-phase arm and the W-phase arm, if the two power transistors are simultaneously turned ON, a short-circuit current may flow therethrough.
In a prior art three-phase PWM signal generating apparatus, in order to avoid the above-mentioned short-circuit current, a common dead time is introduced to delay the ON-timing of each of the U-phase PWM signal, the /U-phase PWM signal, the V-phase PWM signal, the /V-phase PWM signal, the W-phase PWM signal and the /W-phase PWM signal, so that the ON-timing of each of the power transistors of the three-phase PWM inverter is delayed (see: JP-A-10-112982).
In the above-described prior art three-phase PWM signal generating apparatus, however, generally, since the upper side power transistors have a different driving ability from that of the lower side power transistors, i.e., since the upper side power transistors have different ON/OFF switching times from those of the lower side power transistors, an optimum complementary push-pull operation time period, where one of the upper side power transistors is completely turned ON and a corresponding one of the lower side power transistors is completely turned OFF and vice versa, is decreased. As a result, the total torque of the motor would be decreased to increase the power consumption.